CS 230 Winter 2013 Tutorial 7 Monday, March 4, 2013

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1 CS 230 Winter 2013 Tutorial 7 Monday, March 4, This question is based on one from the text book Computer Organization and Design (Patterson/Hennessy): Consider two different implementations of the same instruction set architecture. There are four classes of instructions, A, B, C, and D. The clock rate and CPI of each implementation are given in the following table. Clock Rate CPI Class A CPI Class B CPI Class C CPI Class D P1 1.6 GHz P2 2 GHz a. Given a program with 10 6 instructions divided into classes as follows: 10% class A, 20% class B, 50% class C and 20% class D, which implementation is faster? Since the clock rate for P1 is 1.6 GHz, this means: 1.6x10 9 cycles = 1 sec 1 cycle = 1/(1.6x10 9 ) sec 1 cycle = 0.625x10-9 sec OR 625 ps Since the clock rate for P2 is 2 GHz, through a similar calculation, we see that 1 cycle = 500 ps Total CPU time for the program using P1 is: (0.1x625ps + 0.2x2x625ps + 0.5x3x625ps + 0.2x4x625ps)x10 6 = ps = 1.75 milliseconds The total CPU time for the program using P2 is: (0.1x2x500ps + 0.2x2x500ps + 0.5x2x500ps + 0.2x2x500ps)x10 6 = ps = 1 millisecond This means that the P2 implementation is faster.

2 b. What is the global CPI for each implementation? The total number of clock cycles for P1 is (0.1x x x x4) x 10 6 = cycles Therefore the CPI is /10 6, which is a 2.8 CPI. The total number of clock cycles for P2 is (0.1x x x x2) x 10 6 = cycles Therefore the CPI is /10 6, which is a 2 CPI. OR Since all of the individual instructions in the set have a CPI of 2, then the global CPI is also Assume that the period of the clock cycles in a CPU is 200 ps. Also, assume that the time it takes complete the stages of a MIPS instruction match the chart on Slide 14 of Module 3. a. How many clock cycles are required for the instruction add $1, $2, $3? Since everything has to be coordinated on the beat of the clock, even the stages that only take 100 ps cannot move forward to the next stage until after 200ps. Since add is an example of a R- format instruction (i.e. register access only, does not require memory access), this instruction would take four stages to complete, so it would take 4 clock cycles. b. Consider the following code. Assume that all registers have values previously assigned. add $1, $2, $3 lw $4, 0($2) sw $5, 4($2) add $6, $3, $3 lw $7, 4($8) What would the CPU time be to complete these instructions assuming no pipelining? What would the CPI be for the program in this case?

3 line 1 4 cycles line 2 5 cycles line 3 4 cycles line 4 4 cycles line 5 5 cycles Total cycles: 22 Total CPU time = 22 *200 ps = 4400 ps = 4.4 ns Total instructions: 5 CPI = 22/5 = 4.4 What would the CPU time be to complete these instructions assuming pipelining? What would the CPI be for the program in this case? Since there are no hazards with this code, line 1 starts with the first cycle, line 2 starts with second cycle,, line 5 starts with the fifth cycle, and takes 5 cycles to complete. Total cycles: 9 cycles Total CPU time = 9 * 200 ps = 1800 ps = 1.8 ns Total Instructions: 5 CPI = 9/5 = 1.8 Assume that that these five lines of code are repeated 100 times (i.e. the actual lines are repeated, they are not put in a loop). What would be the CPU time to complete these 500 instructions without pipelining and with pipelining? What would the CPI be for this version of the program without pipelining and with pipelining? Without pipelining: Total cycles: 22 * 100 = 2200 Total CPU time = 2200 * 200 ps = = 440 ns Total instructions: 500 CPI = 2200/500 = 4.4

4 As with the previous question, the 500 th line will start with cycle 500, and take 5 cycles to complete. Total cycles: 504 Total CPU time: 504 * 200 ps = ps = 108 ns Total instructions: 500 CPI: 504/500 = Notice that (without hazards) the CPI is getting very close to Given following MIPS code, draw two diagrams that are similar to the ones on Slide 22 and Slide 23 of module 3: a. Diagram 1: Without forwarding, where the system stalls when data hazard happens; After the first instruction, there will be two lines with stall bubbles, since the write back from the first instruction needs to happen before the register read can happen for the second instruction. b. Diagram 2: With forwarding, where the system uses result when it is computed; With forwarding there are no stall bubbles between the first and second instruction, since the value from register $2 can be forwarded after stage 3 of the first instruction to the ALU for processing. sub $2, $1, $3 slt $12, $2, $5 slt $18, $6, $2 add $14, $2, $2 add $13, $7, $4 sw $15,100($2) Assuming that forwarding is not possible, improve the speed of the execution of the code by rearranging the order of the lines of code, without changing the final result of the program. Moving the 5 th instruction to immediately after the first instruction will avoid one of the stalls. The 5 th instruction is independent from the rest of the instructions, so it can take place at any time.

5 4. Consider the following code segment. Assuming that there is no forwarding, identify all of the hazards in this code. lw $1, 0($4) lw $2, 0($5) add $3, $1, $2 bne $3, $0, L lw $4, 100($1) lw $5, 100($2) sub $3, $4, $5 L: sw $3, 50($1) Data hazards occur: on line 3, which depends on lines 1 and 2 on line 4, which depends on line 3 on line 7, which depends on lines 5 and 6 on line 8, which depends on line 7 A control hazard occurs: on line 4 which can not choose a branch until after it determines if $3 is equal to $0 In the case where a branch instruction also involves a data hazard, you should assume that there will be stall bubbles before the branch instruction because of the data hazard, and a stall bubble after the branch instruction because of the control hazard. 5. Consider the following program addi $3, $0, 0 loop: div $1, $2 mfhi $4 bne $4, $0, 1 add $3, $3, $1 addi $1, $1, -1 bne $0, $1, loop jr $31 Assume that the twoints front end was used to run this program and the user entered 20 and 2 as the values for registers $1 and $2. Assuming that static branch prediction was used. In particular, where there is a loop (i.e. branch backwards) predict the backward branch is taken, and where there is an if (i.e. branch forwards), predict the forward branch is not taken, calculate the number of stalls that were saved using branch prediction.

6 For forward branch (if), in this case the instruction bne $4, $0, 1, static branch prediction assumes that the branch will not be taken. Since for this particular data, the branch will actually not be taken 10 times, then those potential stalls have been avoided. Also, for a loop, in this case the instruction bne $0, $1, loop, static branch prediction assumes that the branch will be taken (backward branch). Since for this particular data, the loop branch is taken 19 times, then those potential stalls have been avoided. In total, static branch prediction saved 29 stalls.