Fujitsu s CPF Based Low Power Design Status & Today s Power Format

Transcription

1 Fujitsu s CPF Based Low Power Design Status & Today s Power Format 2009/05/20 Fujitsu Microelectronics Ltd.

2 Agenda Fujitsu s Low Power Design History and Results Fujitsu s CPF Low Power Design Flow CPF vs. UPF 1

3 Agenda Fujitsu s Low Power Design History and Results Fujitsu s CPF Low Power Design Flow CPF vs. UPF 2

4 Low Power Design History Power Forward Initiative (PFI) Launch ( 06.5) Donated CPF to Si2 ( 06.12) Released CPF1.0 ( 07.3) Released CPF1.1 ( 08.10) Published LP Design Guide (1 st edition) by PFI ( 08.4) PFI, Si2 s Major Activities Published Japanese version LP Design Guide ( 08.12) Joined PFI as core member Contributed Fujitsu LP design methodology to LP Design Guide Started CPF flow verification as Proof-Point Project Introduced CPF on Fujitsu design flow Present at CDN Live! Japan (Jul. 2007) Fujitsu s Major Activities Adopted CPF flow for actual design Present Low Power Seminar (May. 2008) Present CDN Live! Japan (Jul. 2008) Released LSI which was adopted CPF flow 3

5 CPF Low Power Design Flow Merit Power Gating Multi- Conventional Need Expert Need many Work-Around CPF Adoption Enable short TAT due to easy to design 4

6 Agenda Fujitsu s Low Power Design History and Results Fujitsu s CPF Low Power Design Flow CPF vs. UPF 5

7 CPF Low Power Design Flow RTL CPF RTL Sim (IUS) Shut-off function verification CPF debug Logic Synthesis (RC) DFT Layout (SoCE) Isolator/Level Shifter insertion Power Switch insertion Low Power Check (CLP) Structure Check Design Rule Check Function Check Verification (ETS/EPS) 6

8 CPF (Common Power Format) Describes Power Intent as LSI Specification. Describes Power Intent depending on a design phase. design.cpf source library.cpf source libset.cpf set_design DESIGN_NAME set_hierarchy_separator "/ source logical.cpf source physical.cpf end_design library.cpf define_always_on_cell define_isolation_cell define_level_shifter_cell define_power_switch_cell logical.cpf create_power_domain create_nominal_condition create_power_mode create_isolation_rule create_level_shifter_rule libset.cpf define_library_set physical.cpf create_power_nets create_global_connection : Low Power Cell def. Power Domain def. Power Mode def. Isolation Rule def. Shifter Rule def. Library Set def. Power Net def. Power Conn. def. MMMC spec. Design Phase Implementation, Physical Low Power Check Logical Low Power Check Logic Simulation 7

9 Shut-off Simulation with CPF Just prepare logical.cpf to run shut-off simulation. create_power_domain -name PDD -default create_power_domain -name -instances ul1 -shutoff_condition upmu/pso create_isolation_rule -name ISO_ -from -isolation_output low -isolation_condition!upmu/isoen create_nominal_condition -name ON12 -voltage 1.2 create_power_mode -name PM1 -default create_power_mode -name PM2 _conditions (PDD) ul1 () pso upmu isoen RTL CPF IUS Verify Verify X prop. prop. & clamp clamp signal signal with with virtual virtual PSW PSW & Isolator Isolator (PDD) ul1 () X pso OFF upmu isoen 8

10 Isolator / Level Shifter Insertion Isolator / Level Shifter are automatically inserted according to CPF spec. by loading netlist and CPF to SoCE. CPF Isolator / Level Shifter Insertion & Power Domain I/F Isolation Clamp Polarity Isolation Control Signal Isolator / Level Shifter Cell Name Inserted Location (PDD) pso upmu (PDD) pso upmu ul1 () isoen Netlist SoCE ul1 () isoen ISO ul2 (PD2) ul2 (PD2) LS 9

11 Logic and Physical Interface All design intents are not always described in CPF. TOP (ON) (OFF) Depending on the option of the simulator, it can handle this signal as a buffer or as a net. As a net There There is is a risk risk that that CPF CPFcan not not transfer design design intent intent to to implementation properly. As a buffer TOP (ON) H (OFF) H TOP (ON) H (OFF) L L 10

12 Isolation logic equivalence check (1) Need to verify equivalence between Isolators inserted by SOCE and Isolators virtually inserted by RTL simulation. (PDD) pso upmu RTL ul1 () isoen CPF Netlist IUS SoCE (PDD) pso OFF ul1 () upmu isoen Logically Equivalent?? (PDD) ul1 () pso upmu isoen X 11

13 Isolation logic equivalence check (2) Virtual Isolator (in RTL simulation) verification flow CPF RTL Simulation (IUS) Synthesis (RC) Isolator Insertion Log ISO-pin ISO active value Netlist DFT CPF Load (SoCE) Netlist Edit (RC) Utility Script p1/out1 high low d1/out1[2] p1/out1 high low d1/out1[1] p1/out1 high high d2/in1[3] p1/out1 low high d3/in1[0] ISO output value Insert pin Netlist Netlist Formal verification (Conformal-LEC) 12

14 Isolation logic equivalence check (3) Plan to verify virtual Isolator using Conformal-LP CPF RTL Simulation (IUS) Synthesis (RC) LP Inserted Location Info Netlist DFT CPF Load (SoCE) Netlist commit cpf insert_logic Verification (Conformal-LP) 13

15 Rush Current Control The challenges of On Chip Power Gating Supplying enough current to the circuit, realizing small IR-Drop. Controlling Rush current when Power Switches are turned on. PowerIC IR-Drop PowerIC Rush Current Active Circuit Active Circuit Control LSI Power supply Noise Active Circuit Under wake-up process Control LSI Control of of appropriate Power Switch and adjustment of of the size are important 14

16 COLUMN Type Power Switch vs. RING Type Power Switch Area efficiency Routing efficiency Hard IP COLUMN Type PSW Tr size is small PSW prevents horizontal routing Not applicable Need to re-create physical design for power shut-off RING Type PSW Tr size is large No routing restriction inside Power Domain Easy to re-use for power shut-off Wire Blockage Power Supply PSW Corner Cell PSW Filler Cell Macro Macro 15

17 Power Switch Insertion and Placement SOCE can insert & place PSW automatically & accurately based on the specification in CPF update_power_domain -name -primary_power_net 1 create_power_switch_rule -name PSW_ -external_power_net update_power_switch_rule -name PSW_ -cells PSWCELL -prefix PSW -enable_condition_1 {!upmu/pso} (1) pso upmu Power Switch Filler Cell Corner Cell 16

18 Power Domain Aware P&R (1) CPF Netlist.lib.lib.lib lef lef LEF SoCE.lib.lib.lib.lib.lib.lib.lib.lib Library assignment per Power Domain Default.lib.lib.lib.lib ROW partitioning for Power Domain Power Domain PD2 Place Level Shifter & Isolator close to Power Domain boundary.lib.lib.lib.lib PD4 PD3.lib.lib.lib.lib 17

19 Power Domain Aware P&R (2) CPF Netlist.lib.lib.lib lef lef LEF SoCE Placement (Std Cell Placement Scan-Reorder) Optimization (according to Power Domain and ISO/LS Rule) Multi-Mode/Multi-Corner Optimization (can be defined in in CPF) CTS (keep Power Domain Ports) Routing (w/i Power Domain, Antenna Diode insertion, tie-high/low conn.) Physical Cell Placement (Decap, Well Tap, Filler) 18

20 Low Power Check (1) Power Domain A Power Domain B Check Is Isolator or Level Shifter inserted correctly? PSO PDA =1.2V B=1.3V PDB Power Switch Check Is power supply connected correctly? Is Isolator s clamp signal correct? Check Check D Level Shifter Does Isolator work properly at shut-off mode? ISO Y Level Shifter with EN 19

21 Low Power Check (2) Conformal-LP verifies Low Power structure and function Is Isolator or Level Shifter inserted correctly? Is Isolator s Clamp signal correct? Is power supply connected correctly? Does Isolator work properly at shut-off mode? RTL design Phase Logic Synthesis RTL Confomal-LP (Logical Mode) DFT CPF SoCE CPF Load Logical Netlist Isolator insertion with CPF loading Confomal-LP (Logical Mode) Power Switch Insertion Physical Netlist PSW insertion & placement Confomal-LP (Physical Mode) Optimization/CTS/Routing Physical Netlist Layout completion Confomal-LP (Physical Mode) 20

22 Agenda Fujitsu s Low Power Design History and Results Fujitsu s CPF Low Power Design Flow CPF vs. UPF 21

23 CPF vs. UPF (Spec.) Specification CPF Both syntax and semantics are managed by Si2. Spec. is is relatively released earlier, since it it is is determined by Si2 LPC members only. Easy to understand due to simple specification. Easy to deploy in in a Multi Vendor Flow. UPF Syntax is is managed by Accellera & IEEE, but semantics are not managed. Comprehension of commands and support area are different per vendors. Spec. release is is slow, since it it is is determined by many IEEE members. Difficult to understand due to ambiguous specification. Difficult to deploy in in a Multi Vendor Flow. 22

24 CPF vs. UPF (Usability) Usability CPF Logic part and physical part can be separated clearly per design phase. RTL Simulation can be run with only logic part. Easy to deploy for ASIC business. Easy to write and understand due to consistent command naming rule such as create_* for the rule definition, update_* to specify physical info and set_* for variable definition. UPF Need to describe physical information such as Power net name, Power Port name, Power Switch connection at RTL design phase. Difficult to deploy for ASIC business. Difficult to write and understand the usage and semantics from the command name. 23

25 Comparison description for RTL design CPF create_power_domain create_power_domain -name -name PD0 PD0 -default -default create_power_domain create_power_domain -name -name -instances -instances ul1 ul1 -shutoff_condition -shutoff_condition upmu/pso upmu/pso create_isolation_rule create_isolation_rule -name -name ISO_ ISO_ -from -from -isolation_condition -isolation_condition upmu/isoen upmu/isoen create_nominal_condition create_nominal_condition -name -name ON ON -voltage -voltage create_power_mode create_power_mode -name -name PM1 PM1 _conditions _conditions { { } } -default -default create_power_mode create_power_mode -name -name PM2 PM2 _conditions _conditions { { PD0@ON PD0@ON } } Simple & less less code size size UPF create_power_domain create_power_domain PD0 PD0 create_power_domain create_power_domain -elements -elements ul1 ul1 create_supply_port create_supply_port -direction -direction in in create_supply_net create_supply_net PD0 PD0 create_supply_net create_supply_net -reuse -reuse connect_supply_net connect_supply_net -ports -ports create_supply_port create_supply_port VSS VSS -direction -direction in in create_supply_net create_supply_net VSS VSS PD0 PD0 create_supply_net create_supply_net VSS VSS -reuse -reuse connect_supply_net connect_supply_net VSS VSS -ports -ports VSS VSS create_supply_port create_supply_port 1 1 -direction -direction out out create_supply_net create_supply_net 1 1 PD0 PD0 create_supply_net create_supply_net 1 1 -reuse -reuse connect_supply_net connect_supply_net 1 1 -ports -ports 1 1 set_domain_supply_net set_domain_supply_net PD0 PD0 -primary_power_net -primary_power_net -primary_ground_net -primary_ground_net VSS VSS set_domain_supply_net set_domain_supply_net -primary_power_net -primary_power_net 1 1 -primary_ground_net -primary_ground_net VSS VSS create_power_switch create_power_switch PSW_ PSW_ -input_supply_port -input_supply_port {VDIN {VDIN } } -output_supply_port -output_supply_port {VDOUT {VDOUT 1} 1} -control_port -control_port {IN {IN upmu/pso} upmu/pso} -on_state -on_state {state {state VDIN VDIN {IN}} {IN}} set_isolation set_isolation ISO_ ISO_ -isolation_power_net -isolation_power_net -clamp_value -clamp_value 0 0 -applies_to -applies_to outputs outputs set_isolation_control set_isolation_control ISO_ ISO_ -isolation_signal -isolation_signal upmu/isoen upmu/isoen -isolation_sense -isolation_sense low low -location -location parent parent add_port_state add_port_state -state -state {ON {ON 1.2} 1.2} add_port_state add_port_state 1 1 -state -state {ON {ON 1.2} 1.2} -state -state {OFF {OFF off} off} create_pst create_pst PST PST -supplies -supplies { { 1} 1} add_pst_state add_pst_state PM1 PM1 -pst -pst PST PST -state -state {ON {ON ON} ON} add_pst_state add_pst_state PM2 PM2 -pst -pst PST PST -state -state {ON {ON OFF} OFF} Too Too many codes 24

26 CPF vs. UPF (Tool Support) Tool Support CPF Practical for actual design project. (already in in the brush-up phase) Accurate behavior according to power intent specification in in CPF. Supports Ring Type Power Switch. UPF In many case, Tool s native commands are used instead of UPF information to implement Low Power technique. Some tools can not distinguish between its native commands and UPF commands. No support of Ring Type Power Switch. 25

27 CPF vs. UPF (Flow) Flow CPF Can keep using CPF, which was verified at the logic design phase, as a golden CPF throughout the design flow. UPF Need UPF equivalence checking at each design phase, since UPF is is modified at each design phase. 26

28 Conclusions Fujitsu developed a reliable Low Power design flow by adopting CPF ahead of the world-wide. Fujitsu appreciates Cadence s effort and expects further cooperation. CPF is more practical and has the quality to be de facto standard as Power Format comparing UPF. Fujitsu is expecting further progress of CPF. 27

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