Lecture 4: Opamp Review. Inverting Amplifier (Finite A 0 )

Transcription

1 Lecture 4: Opamp eview Effect of fite open-loop ga, A Frequency dependence of open-loop ga Frequency dependence of closed-loop ga Output voltage and current saturation Output slew rate Offset voltage Input bias and offset current Non-zero put resistance Assume NON-ideal op amp. Invertg Amplifier (Fite A ) X A X A A For fite open loop ga A, the error term dicates the larger the closed-loop ga, the less accurate the circuit becomes. X

2 Nonvertg Amplifier (Fite A ) A A A Use the followg approximation: when x>> ) ~ ( ) ( x x To factor the A /(+) term the denomator Larger A CL, larger the ga error Opamp speed limitation Due to ternal capacitances, the ga of op amps begs to roll off.

3 Unity Ga Bandwidth ω b =ternal pole of opamp Bandwidth and closed loop ga (Fite A ) ω t =A ω b ω 3db =closed loop opamp 3dB bandwidth Product of ga and bandwidth 3

4 Ga Bandwidth Product ~(+ / ) Havg a loop around the op amp (vertg, nonvertg, etc) helps to crease its bandwidth. However, it also decreases the low frequency ga. Slew ate of Op Amp In the lear region, when the put doubles, the put and the put slope also double. However, when the put is large, the op amp slews so the put slope is fixed by a constant current source chargg a capacitor. This further limits the speed of the op amp. For large put, the ternal circuitry of the op amp reduces to a constant current source chargg a capacitor. The slope of the put ramp is called he slew rate As it can be seen, the settlg speed is faster with slew rate (as determed by the closed-loop time constant). 4

5 Slew ate Limit on Susoidal Signals As long as the put slope is less than the slew rate, the op amp can avoid slewg. However, as operatg frequency and/or amplitude is creased, the slew rate becomes sufficient and the put becomes distorted. d dt ( t) s ωt ( t) ω cos ωt cos t Maximum Op Amp Swg To determe the maximum frequency before op amp slews, first determe the maximum swg the op amp can have and divide the slew rate by it. max m s t max m Note that any put DC offsets will cause a reduction the maximum voltage swg and S before clippg If the opamp provides a slew rate of S, then the maximum frequency of a susoid can be obtaed by: d dt max S FP S max m Called the full-power bandwidth Useful measure of large signal speed of opamp 5

6 Input Offset oltage, OS ero differential put Ideally zero put Defe OS as put needed to zero put Typical values: m to 5 m O caused by OS depends on closed-loop circuit ef. Sedra and Smith, Fig..8 Effects of DC Offsets Offsets an op amp that arise from put stage mismatch cause the put-put characteristic to shift either the positive or negative direction (the plot displays positive direction). As it can be seen, the op amp amplifies the put as well as the offset, thus creatg errors. os 6

7 Saturation Due to DC Offsets Sce the offset will be amplified just like the put signal, put of the first stage may drive the second stage to saturation. Offset Integrator A resistor can be placed parallel with the capacitor to absorb the offset. However, this means the closed-loop transfer function no longer has a pole at orig. s C sc ecall that the response to an put for the non-vertg tegrator configuration is the put itself plus the tegral of the put (i.e. the second term). Assumg the itial condition across C is zero, the circuit tegrates the op-amp offset generatg an put that tends to +f or f, dependg on the sign of os. 7

8 Offset Integrator Sce at low frequency C is effectively an Open. For stance, if os=m and /=, then contas a DC error of m, but at least remas away from saturation. How does affect the tegration function? Disregardg OS, viewg the circuits Figure (d) and usg Placg parallel with C limits the put voltage by compared to os C s C s The circuit now contas a pole at - / C rather than at the orig. If the put signal frequencies of terest lie well above this value, then Cs>> and C s That is, the tegration function holds for frequencies much higher than /C. / should be small to mimize the amplified offset and C must be sufficiently large to have negligible impact on the freq. of terest Input Bias and Offset Currents Op amp put leakage current occurs on dc operatg pot Depends on leakage current electronic device MOS transistor Ab picoampere ( - amperes) Bipolar junction transistor Ab nanoamperes ( -7 amperes) Input bias current I B = (I B + I B )/ Input offset current I OS = I B I B ef. Sedra and Smith, Fig..3 8

9 Input Bias Current The effect of gate leakage or bipolar base currents can be modeled as current sources tied from the put to ground. These currents are typically very small (na to ua) Consider Fig (a). IB has no effect because it flows through a voltage source. Usg superposition and settg =, we arrive at Fig (b), which can be expressed as Fig (c) usg a thevan equivalent of = xib and resultg (assumg the opamp ga is fite) I B I B Input Bias Current Cancellation We can cancel the effect of put bias current by sertg a correction voltage series with the positive termal. In order to produce a zero put, corr=-ib( ). I corr B corr IB For = 9

10 Effects of Input Bias Currents on Integrator Input bias current will be tegrated by the tegrator and eventually saturate the amplifier. C I B dt C I B I B dt C So the flow of IB through C will saturate the opamp. That is, the opamp tegrates the current IB forcg the put to pos or neg rails. Placg a resistor series with the non-vertg put can cancel this effect. dt Nonzero Output esistance In practical op amps, the put resistance is not zero. Consider vertg amplifier. Place series with put voltage source v v Closed loop ga with A A