Non-linear operating point statistical analysis for local variations in logic timing at low voltage

Transcription

1 Non-lnear eratng pont statstcal analyss for local varatons n logc tmng at low voltage The MIT Faculty has made ths artcle enly avalable. Please share how ths access benefts you. Your story matters. Ctaton As Publshed Publsher Rahul Rthe eta l. "Non-lnear eratng pont statstcal analyss for local varatons n logc tmng at low voltage." Desgn, Automaton & T n Eure Conference & Exhbton, , EDAA 569&contentTypeConferencePublcatons&searchFeld%3D Search_All%6queryText%3DNonlnearOperatngPontStatstcalAnalyssforLocalVaraton snlogctmngatlowvoltage Insttute of Electrcal and Electroncs Engneers (IEEE Verson Fnal publshed verson Accessed Thu Jul 9 3:0: EDT 08 Ctable Lnk Terms of Use Detaled Terms Artcle s made avalable n accordance wth the publsher's polcy and may be subject to US cyrght law. Please refer to the publsher's ste for terms of use.

2 Non-lnear Operatng Pont Statstcal Analyss for Local Varatons n Logc Tmng at Low Voltage Rahul Rthe, Je Gu, Alce Wang, Satyendra Datla, Gordon Gamme, Denns Buss, Anantha Chandrakasan Massachusetts Insttute of Technology Cambrdge, MA 039, USA {rjrthe, anantha}@mtl.mt.edu Texas Instruments Dallas, TX 7543, USA {j-gu, alwang, sdatla, g-gamme, buss}@t.com Abstract For CMOS feature sze of 65 nm and below, local (or ntra-de or wthn-de varatons n transstor Vt contrbute stochastc varaton n logc delay that s a large percentage of the nomnal delay. Moreover, when crcuts are erated at low voltage (Vdd 0.5V, the standard devaton of gate delay becomes comparable to nomnal delay, and the Probablty Densty Functon (PDF of the gate delay s hghly non-gaussan. Ths paper presents a computatonally effcent algorthm for computng the PDF of logc Tmng Path ( delay, whch results from local varatons. Ths approach s called Non-lnear Operatng Pont Analyss for Local Varatons (NLOPALV. The approach s mplemented usng commercal STA tools and ntegrated nto the standard CAD flow usng custom scrpts. Tmng paths from a 8nm commercal DSP are analyzed usng the prosed technque and the performance s observed to be wthn 5% accuracy compared to SPICE based Monte-Carlo analyss. Keywords- SSTA, Local Varatons, Low-voltage, Statstcal Desgn I. INTRODUCTION There are three categores of process varatons that are mportant n desgn of modern CMOS logc [].. Global random varaton n gate length, gate wdth, flatband voltage, oxde thckness and channel dng.. Systematc or predctable varatons, such as varatons n ltho or etch or CMP. 3. Local random varatons n transstor parameters. Local random varatons are assumed to be random from one transstor to another wthn a de. Ths paper deals wth the effect that local varatons n CMOS transstor parameters have on logc tmng at low voltage (Vdd 0.5V. Local varatons are prmarly the result of varatons n the number of dant atoms n the channel of CMOS transstors [, 3]. Local varatons have long been known n analog desgn and n SRAM desgn. In analog desgn, local varatons are called msmatch because of the msmatch n the V t of adjacent transstors. But they have not generally been a problem for logc. However, shrnkng of transstor geometres and low voltage desgn, for ultra-low power applcatons, make local varatons ncreasngly mportant for logc. Some approaches for handlng local or ntra-de varatons have been prosed [4-8]. However ths paper extends prevous work n several mportant ways. It descrbes an approach to calculate the PDF of logc delay whch results from local transstor varaton. We call ths approach the Nonlnear Operatng Pont Analyss for Local Varatons (NLOPALV. At Vdd 0.5V, crcut delay s hghly nonlnear n V t varaton. The result s that the PDF of the delay s hghly non-gaussan. As shown later n ths paper, the Gaussan assumpton results n substantal error at Vdd 0.5V. Ths approach deals only wth local varatons and needs to be used n conjuncton wth conventonal approaches to generate global fast and slow corners. The effect of local varatons s very dfferent from the effect of Global varatons. Whereas global varatons n delay add lnearly, local varatons do not. Let us assume, for a moment that the PDF of each cell s Gaussan. If we have a number of such cells havng local stochastc delay characterzed by standard devaton o, the delays add n quadrature, meanng that the varance of the delay s gven by σ σ. If we add the σ lnearly, we would get an overly pessmstc result. In ths paper, we employ the concept of eratng pont, whch has the advantage that the stochastc delay of a can be computed by lnearly addng the eratng pont delays of the respectve cells. The frst step n calculatng the effect of local varatons on logc tmng s the characterzaton of standard logc cells for local varaton. Characterzaton needs to be done for each arc for each cell. An arc s defned by nput rse or fall, output load capactance and 3 nput slew. Characterzaton needs to be done for each global corner of mportance. The analyss of ths paper starts wth pre-characterzed logc cells. For every arc of every cell (every arc-cell there exsts a PDF of the delay. Referrng to Fg., t s clear that any arbtrary (n general non-gaussan PDF can be mapped onto a unt varance Gaussan through the Cell-Arc Delay Functon (CADF D(ξ. Note, for a Gaussan PDF, D(ξ s a straght lne: D(ξ σ ξ. Characterzaton also provdes the Cell-Arc Slew Functon (CASF S(ξ, whch s the most probable output slew for each value of ξ. The computatonal effcency of the NLOPALV approach results from the fact that the entre PDF of the s not usually requred. In analyss, we are usually ntered n the f-sgma delay where f ~ 3 for setup tme and f ~ -3 for hold tme /DATE0 00 EDAA

3 To graphcally llustrate ths concept, consder the followng. At the eratng pont, D ( f D fσ. Furthermore, the eratng pont les on the hyper-sphere ξ t follows that the eratng pont results from the smultaneous soluton of the above equatons. f. From ths, Fgure. Gaussan mappng of non-gaussan PDF through CADF In the space allowed for ths paper, the complete theory underlyng the NLOPALV approach can not be presented. In secton II, the NLOPALV approach wll be presented wthout dervaton. The valdty of the approach wll be demonstrated by the accuracy of the results on actual crcuts presented n secton II and III. The theoretcal justfcaton wll be presented n a future publcaton. II. MULTI-STAGE LOGIC PATH SSTA ANALYSIS The goal of mult-stage SSTA s to determne the 3-sgma delay (or n general the f-sgma delay wthout ncurrng the computatonal expense of computng the entre PDF of the delay. In general, the PDFs of the logc cell delays are hghly non-gaussan. However, even n the nonhas meanng. As Gaussan case, the concept of f-sgma delay shown n Fg, the -sgma pont s the % quartle, the 3-sgma pont s the % quartle etc. However, n the non-gaussan case, the σ defned by quartle s unrelated to the standard devaton of the non-gaussan varable. Usng the NLOPALV approach, the eratng pont s determned, and the f-sgma eratng pont delay s approxmated by a lnear combnaton of eratng pont delays for the ndvdual logc cells. Ths s done wthout the need for Monte-Carlo smulatons or addtonal SPICE smulatons. A. Sngle Logc Path We start wth a tmng path of N logc cells, each of whch s characterzed by D (ξ, and we want to determne the f- sgma delay. For smplcty, we assume that the stochastc delays D are statstcally ndependent. (We wll see below that ths smplfyng assumpton s not true, and we wll address ths complcaton. We defne the f-sgma eratng pont as: f α dd ξ ; where α ( N ( α j j Equaton ( needs to be solved teratvely, but once the eratng pont of the s determned, we can approxmate the f-sgma tmng path delay as a lnear sum of eratng pont delays of the consttuent logc cells: Dfσ D( ξ ( Consderng D as ntal mates of D fσ we get a famly of curves. The Operatng Pont s thee pont of tangency of the curve D ( f wth the hyper-sphere ξ f and the D value of D that defnes the curve s the desred value of Fg llustrates ths dea. Fgure. Mult-stage Operatng Pont In the -stage case, makng lnear approxmaton n the regon near the eratng pont, we can determne the eratng pont as the pont of tangency of the lne αξ αξ D wth the crcle ξ ξ f. The eratng pont can thus be gven f α f α as: ξ and ξ (3 α α α α Ths analyss can be easly extended to N stage tmng path where the eratng pont s gven by equaton (. However, n real tmng paths, the stage delays D are not statstcally ndependent. The stochastc delays of adjacent stages are correlated snce the output slew of one stage s the nput slew of the next. Ths correlaton can be ncorporated nto the tmng path analyss by modfyng the eratng pont as: f ( α η, λ, ξ (4 N ( α η λ,, dd Where, α, η λ dd f dd, D, D 3 Algorthm for Non-lnear Operatng Pont Analyss for Local Varatons (NLOPALV Ths approach leads us to an teratve algorthm for determnng the eratng pont and thereon computng D fσ that can be summarzed as follows: Operatng Pont D, D 3, ds ds,,,, ds, ds, D (5

4 nom. Determne the nomnal delays D for each stage n the tmng path.. Make the ntal mate of the eratng pont as: nom fd ξ nom ( D 3. At the mated eratng pont, calculate α, η, and λ for N as defned by (5., 4. Compute new mate of the eratng pont usng the expressons gven by (4. 5. Repeat steps 3 and 4 untl the eratng pont converges to a constant value. 6. The delay can then be obtaned as: N N N ξ, ξ, ξ D ( f D( D ( D ( (6 where, D ( ξ s drectly obtaned from the cell characterzaton data and: dd, ( D ξ S ( ξ ds, (7 D,, ( ξ ( ξ ds, ds, B. Integraton wth the CAD flow In order to effectvely use SSTA n the desgn process, t s mportant to ntegrate the NLOPALV algorthm wth exstng CAD flow. The NLOPALV algorthm presented above s ntegrated wth a commercal STA Tmer. Fg 3 descrbes the process n the form of a flow-chart. Fgure 3. CAD flow for Logc Path NLOPALV analyss C. Results To valdate the NLOPALV approach develed here, we ted t on logc paths taken from a commercal Dgtal Sgnal S (8 Processor mplemented n 8nm technology, eratng at 0.5V. We used the NLOPALV algorthm and the correspondng CAD flow to determne 3-sgma delay for the logc tmng path and compared the results wth those obtaned from SPICE based Monte-Carlo analyss. Fg. 4 shows the comparson results for dfferent tmng paths. Fgure 4. Performance comparson for NLOPALV vs. Monte-Carlo The 3-sgma delay obtaned from NLOPALV analyss s wthn 5% accuracy compared to 0,000 ponts SPICE based Monte- Carlo analyss. Theoretcal analyss shows that the NLOPALV approach always undermates the stochastc delay compared to Monte-Carlo analyss and ths s valdated by Fg. 4. Fgure 5. delay PDF: The zero-sgma delay s the nomnal delay. The Gaussan approxmaton s chosen such that the standard devaton for the Gaussan s same as the σ delay for NLOPALV Fg 5 shows comparson between the NLOPALV approach and Monte-Carlo for a typcal tmng path at 0.5V. It shows excellent agreement between the NLOPALV approach and Monte Carlo and also llustrates the nadequacy of the Gaussan approxmaton at low voltage. It s nformatve to note that:. The PDF of the delay peaks at a pont n tme that s less than the nomnal delay (zero-sgma delay. The mean of the non-gaussan PDF les.6ns to the rght of the nomnal delay, whereas n the Gaussan approxmaton, the stochastc delay has zero mean. 3. The 3σ stochastc delay s delay s 3.4ns, compared to a nomnal delay of 9.7ns. Ths shows that the varaton at 0.5V can be much hgher than the nomnal delay tself. 4. The 3-sgma stochastc delay calculated usng the Gaussan approxmaton s 8.53ns compared to the actual 3-sgma stochastc delay of 3.4ns. Ths shows that the Gaussan approxmaton s hghly tmstc. The NLOPALV analyss was performed on dfferent paths of dfferent lengths, taken from the 8nm Dgtal Sgnal Processor. Table summarzes addtonal results for a few of these paths. The 3-sgma delay (nomnal 3σ stochastc delay computed usng NLOPALV shows excellent agreement wth Monte-Carlo. Ths contrasts wth the large errors that result when the delay s assumed to be Gaussan.

5 TABLE I. PERFORMANCE COMPARISON OF NLOPALV VS. MONTE- CARLO AND GAUSSIAN APPROX. Nomnal 3-Sgma Stochastc Delay (ns # Delay NLOPA Monte- % Gaussan % (ns LV Carlo Error Approx. Error % % % % % % % % % % % % % % % % III. TIMING PATH SETUP AND HOLD ANALYSIS After verfyng the approach on sngle logc paths, we now extend t to perform setup and hold tme analyss on tmng paths ncludng clock paths. Fg 6 shows a typcal tmng path for setup/hold analyss. CLK Path Common CLK Path Fgure 6. Typcal tmng path for setup/hold analyss Consder the hold constrant: D > D Thold In presence of statstcal varatons, we need to make sure that: 3 ( D D 3 T σ σ hold > 0 (9 Smlarly, we can get the setup constrant as: < (0 3 ( D D 3 T σ σ setup TCLK D Q REG CLK Path- Path LOGIC Path D D Q REG CLK Path- Where, T CLK s the clock perod for the desgn. The PDFs for setup/hold tme for the regsters are obtaned from cell characterzaton. The NLOPALV approach descrbed n secton II can be used to compute ( D D / 3σ by consderng the paths D and D together and computng the /-3σ eratng pont for the cells n both these paths taken together. Ths approach s verfed by consderng tmng paths along wth the correspondng clock paths from a Dgtal Sgnal Processor. The 3σ setup/hold slack s computed usng the NLOPALV approach descrbed above and the results are compared wth those obtaned from SPICE based Monte-Carlo smulatons. Tmng paths taken from the same DSP are used and the results are summarzed n Fg. 7 n the form of % error compared to Monte-Carlo analyss. Fgure 7. Setup/hold analyss: NLOPALV vs. Monte-Carlo D IV. CONCLUSIONS Ths paper presents a computatonally effcent approach to calculatng the stochastc delay n logc at low voltage. The approach has been mplemented usng commercal STA tools and ntegrated nto the exstng standard CAD flow. The approach s verfed by performng 3-Sgma delay computatons for crtcal paths taken from a commercal Dgtal Sgnal Processor. Comparson of the results wth those obtaned from detaled SPICE based Monte-Carlo analyss demonstrates the hgh accuracy of the approach. The NLOPALV computaton runs n lnear tme wth respect to number of stages, whereas the Monte-Carlo analyss has exponental run tme. In ths approach, no expensve Monte-Carlo smulatons are requred durng tmng closure. Our approach does not assume delay PDF to be Gaussan and can handle the case where delay s hghly non-lnear functon of random varables wth non-gaussan PDF. The concept of eratng pont greatly smplfes computatons despte nonlneartes wthout sacrfcng accuracy. Furthermore, ths approach could be extended for tmzng the desgns to reduce the stochastc delays. The NLOPALV approach has proved very useful for performng cell characterzaton as well as tmng closure. Future publcatons wll cover:. Detals of NLOPALV theory.. Cell characterzaton usng NLOPALV. 3. MAX eraton for convergent paths. 4. Applcaton of NLOPALV to tmng closure of a complete chp and run-tme analyss. ACKNOWLEDGMENT Rahul Rthe was supported by the MIT Presdental Fellowshp durng the course of ths project. REFERENCES [] M. Orshansky, S. R. Nassf, D. Bonnng, Desgn for Manufacturablty and Statstcal Desgn, Sprnger, 008. [] A. Asenov, "Random dant nduced threshold voltage lowerng and fluctuatons," Electron Devces, IEEE Transactons on, vol. 45, pp , 998. [3] P. Andre and I. Mayergoyz, "Random dng-nduced fluctuatons of subthreshold characterstcs n MOSFET devces," Sold-State Electroncs, vol. 47, pp , [4] A. Agarwal, D. Blaauw, V. Zolotov, S. Sundareswaran, M. Zhao, K. Gala, R. Panda, Path-based Statstcal Tmng Analyss Consderng Inter and Intra-de Correlatons, Proceedngs of TAU 00, pp 6-, 00. [5] A. Agarwal, D. Blaauw, V. Zolotov, Statstcal Tmng Analyss for Intra-de Process Varatons wth Spatal Correlatons, Proceedngs of ICCAD 003, pp , 003. [6] H. Mangassaran, M. Ans, On Statstcal Tmng Analyss wth Interand Intra-de Varatons, Proceedngs of DATE 005, pp. 3-37, 005. [7] K. Homma, I. Ntta, T. Shbuya, Non-Gaussan Statstcal Tmng Models of De-to-De and Wthn-De Parameter Varatons for Full Chp Analyss, Proceedngs of ASP-DAC 008, pp. 9-97, [8] S. Sundareswaran., J. A. Abraham, A. Ardelea, R. Panda, Characterzaton of Standard Cells for Intra-Cell Msmatch Varatons, Proceedngs of the 9th nternatonal Symposum on Qualty Electronc Desgn (March 7-9, 008. Internatonal Symposum on Qualty Electronc Desgn. IEEE Computer Socety, Washngton, DC, 3-9.