Do s and Don ts for Commercial Success of PICs

Transcription

1 Photonic Fraunhofer Integration Conference Heinrich Hertz 2016 Institute Do s and Don ts for Commercial Success of PICs Martin Schell, PHI 2016, Eindhoven Fraunhofer Heinrich Hertz Institute, Einsteinufer 37, Berlin Do s and Don ts for Commercial Success of PICs Historical examples for success and failure How big is your Volume? What should you integrate (Active Optics / Passive Optics / Electronics)? Which Technology should you use? Conclusion martin.schell@hhi.fraunhofer.de May 27,

2 Example 1: Coherent Receiver PIC (HHI, NTT, Bell Labs, ~1994) TE Balanced photodiodes HEMT amplifiers TM SM fiber Local oscillator 4 section BH DBR laser /1.5 µm Polarization diversity waveguide circuit polarization rotator TE/TM splitter 3 db directional coupler Sole motivation for coherent reception was sensitivity martin.schell@hhi.fraunhofer.de May 27, ~50 PY invested into technology development at HHI alone 5-section tunable DFB 45 polarization rotator Balanced detectors Module martin.schell@hhi.fraunhofer.de May 27,

3 Everything was stopped in section tunable DFB 45 polarization rotator Balanced detectors Module May 27, because the EDFA came manually assembled 20+ db gain < 500 1,000 pcs martin.schell@hhi.fraunhofer.de May 27,

4 Example 2: FTTH components (~ ) Laser in TO-can Analog Detector in TO-can 1555nm downstream analog 1310 nm upstream digital Fiber 1490 nm downstream digital Digital Detector in TO-can About 100 components, manual assy steps Highest production volume (~10 Mio pcs p.a.) => Advantage of optical integration seems obvious May 27, Various PIC approaches were developed 1.3 µm WG abs 1.5 µm PD 1.3µm surface abs 1.3 µm DFB martin.schell@hhi.fraunhofer.de May 27,

5 Now guess who is the winner after ~2-300 $M investor/public money spend 1.3 µm WG abs 1.5 µm PD 1.3µm surface abs 1.3 µm DFB May 27, Now guess who is the winner after ~2-300 $M investor/public money spend 1.3 µm WG abs 1.5 µm PD 1.3µm surface abs 1.3 µm DFB martin.schell@hhi.fraunhofer.de May 27,

6 Success Example 1: Long Reach (2012+) Coherent Receiver (e.g. Finisar / Oclaro / NeoPhotonics) Tunable laser w/ or w/o Modulator (e.g. Finisar / Oclaro / JDSU) 5.7 x 1.3 mm 2 10x 10/40 Gbit DWDM (Infinera) ~4 mm 2 Source: Infinera, HHI 4x5 mm 2 martin.schell@hhi.fraunhofer.de May 27, Success Example 2: Short Reach / Long Reach 4x10G Transmitter (Luxtera, 5x6 mm 2 ) 10G Transmitter (LightWire, 4x4 mm 2 ) 100G Transponder (Acacia) Source: Luxtera, OIDA 2010 WS on Silicon Photonics, ACACIA website martin.schell@hhi.fraunhofer.de May 27,

7 Do s and Don ts for Commercial Success of PICs Historical examples for success and failure How big is your Volume? What should you integrate (Active Optics / Passive Optics / Electronics)? Which Technology should you use? Conclusion martin.schell@hhi.fraunhofer.de May 27, Understand your cost structure Example Telekom: 1-2 $ optochip drives 5 $ Optical subassembly (+Driver, TIA, Fiber connection) drives 10 $ Transceiver / Transponder (+Ser/Des, DSP, digital interface, ) drives 20 $ System costs (Rack delivered to Telekoms) Even optochip costs zero justify only few performance penalty on system level martin.schell@hhi.fraunhofer.de May 27,

8 1.5 µm PD 1.3 µm WG abs 1.3µm surfaceabs 1.3 µm DFB Datum Cost structure in Electronics is not so different 4.6 X but bad chip performance can sometimes be compensated by better End Equipment design martin.schell@hhi.fraunhofer.de May 27, Explanation for FTTH historic failure Vs. just targeted labor/assy costs 10 to 20 min labor savings = (Mainland Chinese level) did not target / achieve significant Bill of Materials reduction martin.schell@hhi.fraunhofer.de May 27,

9 - Coherent Receiver Success classic PIC Sub (<5 ) precision required on ~cm length scale Stable over temperature and lifetime => PIC performance advantage > PIC cost advantage Source: HHI martin.schell@hhi.fraunhofer.de May 27, Do s and Don ts for Commercial Success of PICs Historical examples for success and failure How big is your Volume? What should you integrate (Active Optics / Passive Optics / Electronics)? Which Technology should you use? Conclusion martin.schell@hhi.fraunhofer.de May 27,

10 Do s and Don ts How big is your volume? (and how sure are you about your predictions?) Upfront development costs / time Production phase Big Volume Dedicated wafer runs to save time Dedicated package development to save costs Choose High Volume capable material (Si, Polymer) Small Volume Multi Project Wafers to save costs Adjust optochip to existing / standard package Also consider Low Volume platforms (InP, GaAs) Sometimes, a two versions strategy is appropriate for risk mitigation martin.schell@hhi.fraunhofer.de May 27, Do s and Don ts Do not underestimate upfront costs Design+Mask: 180 nm 22 nm Electronics, not Optics Seems too high for me Source: XILINX Business report 2012, data according to Gartner martin.schell@hhi.fraunhofer.de May 27,

11 Do s and Don ts for Commercial Success of PICs Historical examples for success and failure How big is your Volume? What should you integrate (Active Optics / Passive Optics / Electronics)? Which Technology should you use? Conclusion martin.schell@hhi.fraunhofer.de May 27, What should you integrate (Active Optics / Passive Optics / Electronics)? More integration (monolithic, in the same material system) means: Lower assembly costs Lower / no assembly yield loss Lower package BOM costs (sometimes) More performance compromises More development effort (sometimes) martin.schell@hhi.fraunhofer.de May 27,

12 Active Optics / Passive Optics Integration: Laser / Silicon Tunable laser for C-Band (InP/Si, NEC) 4xParallel Amplifier for Switch Matrix (InP/SiN, IBM/HHI) Source: K. Sato et al., ECOC 2015, We2.5.4; L. Schares et al., OFC 2016, Th3F.5 martin.schell@hhi.fraunhofer.de May 27, Active Optics / Passive Optics Integration: Laser, Detector, /Polymer Thin Film Filter based or polarization mux Adjustment free SM fiber attachment Tunable laser with InP gain chip Arrayed Waveguide Grating with detector array Polmux coherent receiver with integrated local oscillator 3D stacked polymer waveguides Source: HHI martin.schell@hhi.fraunhofer.de May 27,

13 Optics / Electronics Integration by stacking different Silicon ICs Transceiver for 56Gb/s NRZ Two stacked (Silicon) ICs connected with fine pitch copper pillars Source: Gilles Denoyer et al., ECOC 2014, PD2.4 (Finisar / STMicro) martin.schell@hhi.fraunhofer.de May 27, Optic Electronic Integration by stacking Tomorrow like this? metal interconnects heat sink polymer bonding layer planarization layer III-V circuit BiCMOS circuit Source: EU WIPE Wafer scale Integration of Photonics and Electronics project, lead U Eindhoven martin.schell@hhi.fraunhofer.de May 27,

14 Do s and Don ts for Commercial Success of PICs Historical examples for success and failure How big is your Volume? What should you integrate (Active Optics / Passive Optics / Electronics)? Which Technology should you use? Conclusion martin.schell@hhi.fraunhofer.de May 27, Which Technology should you use? Silicon Photonics Silicon Nitride InP Polymer Best for e/o integration Smallest size Best for longest waveguides, lowest loss Best for laser / actives integration Most mature Lowest upfront and volume costs Easiest for hybrid integration Difficult to get light in and out No actives integration, no e/o integration High area costs Only µm Least mature martin.schell@hhi.fraunhofer.de May 27,

15 Do s and Don ts for Commercial Success of PICs Historical examples for success and failure How big is your Volume? What should you integrate (Active Optics / Passive Optics / Electronics)? Which Technology should you use? Conclusion martin.schell@hhi.fraunhofer.de May 27, Conclusion Do nts Do not try to win on costs unless you understand the cost structure up to system level Do not believe that incumbent technologies stop development Dos Make reasonable volume estimates, estimate full lifetime costs including upfront costs There is not yet, probably never will be a one-technology-fits-all: Carefully take all integration options into account (hybrid / monolithic, passive/active, with/without electronics) For risk mitigations, maybe think in V1 (MPW, hybrid) and V2 (dedicated wafers, monolithic integration) Take external advice martin.schell@hhi.fraunhofer.de May 27,