IEOR 130 Fall, 2017, Prof. Leachman Solutions to Homework #2

Size: px

Start display at page:

Download "IEOR 130 Fall, 2017, Prof. Leachman Solutions to Homework #2"

Lillian Reynolds
6 years ago
Views:

1 IEOR 130 Fall, 017, Prof. Leachman Solutions to Homework # 1. Speedy Micro Devices Co. (SMD) fabricates microprocessor chips. SMD sells the microprocessor in three speeds: 300 megahertz ("Bin 1"), 33 megahertz ("Bin "), and 150 megahertz ("Bin 3"). The selling prices are $00 per chip for 300 mhz chips, $50 per chip for 33 mhz chips and $10 per chip for 150 mhz chips. These three chip types are actually different grades of quality of a single SMD chip type that is fabricated. All chips on each completed SMD wafer are tested. Assume exactly 100 dice per wafer function correctly, but the speed of each functioning chip is a random variable. Assume the speed is checked for all 100 functioning dice per wafer at SMD. Chips operating at 300 mhz or better are classified as "Bin 1" chips; chips operating between 33 and 300 mhz are classified as "Bin " chips; chips operating between 150 mhz and 33 mhz are classified as "Bin 3" chips; and chips operating slower than 150 mhz are considered scrap. Assume the average speed range (fastest speed minus slowest speed) per wafer is 00.6 mhz. On average, 4 functioning chips per wafer are found to operate at speeds below 150 mhz and are considered scrap. (a) Assuming a normal distribution for chip speed, what is the mean speed and the standard deviation of speed for functioning die? (Hint: What Z factor corresponds to a 4% tail of the normal distribution?) The sample size is n = 100, and the average range, R is From the table in the back of the book, d = Hence = R / d = 00.6 / = 40. Now + Z* = 150 for some Z, and we are given that 4% fall below the LSL, i.e., Prob. { Z < () / } = From the table in the back of the notes, Z = Hence = (40) = 0. (b) What is the average number of chips per wafer in each of the three bins of quality? What is the average revenue per wafer? For bin 3, Z (33-0) / 40 = From the table in the back of the notes, the probability Z lies in this range is = Hence we expect 59 chips per wafer in bin 3. 1

2 For bin, 0.35 Z (300 0) / 40 =.0. From the table in the back of the notes, the probability Z lies in this range is = Hence we expect 35 chips per wafer in bin. For bin 1, Z, which has probability Hence we expect chips per wafer in bin 1. The expected revenue per wafer is thus (00) + 35(50) + 59(10) = 740. (c) If 150 mhz is defined to be the lower spec limit for speed, what is the Cpk value for chip speed? We have a one-sided spec limit, so Cpk = ( LSL) / 3*, or Cpk = (0 150) / 3*40 = (d) If the process mean could be shifted upwards by 0 mhz, by how much would the average revenue per wafer increase? Suppose rises to 40 (while stays the same). For bin 1, Z (300 40) / 40 = 1.5. From the table in the back of the notes, the probability Z lies in this range is Hence we expect 7 chips per wafer in bin 1. For bin, 1.5 Z (33 40) / 40 = From the table in the back of the notes, the probability Z lies in this range is = Hence we expect 50 chips per wafer in bin. For bin 3, Z (150 40) / 40 = -.5. From the table in the back of the notes, the probability Z lies in this range is = Hence we expect 4 chips per wafer in bin 3. The expected revenue per wafer rises to 7(00) + 50(50) + 4(10) = 430, making for an increase of $1580 per wafer or almost a 58% increase.. In the measurement of a critical dimension after the photolithography step, X-bar and R control charts are used. Measurements are made at five different points on the surface of one wafer per production lot, from which the average and range of the measurements are computed. The control charts have the usual three-sigma limits. (a) The upper control limit in the range chart is The upper spec limit is 50.0 and the lower spec limit is What is the process capability index? For n = 5, d3 = 0, so LCL = 0. UCL = d4* R =.11* R, so R =110.5/.11 = 5.37, and therefore = R / d = 5.37 /.36 =.515

3 Hence Cp = (USL - LSL) / 6 = ( )/(6*.515) = 1.48 (b) The upper control limit in the X-bar chart is 3.5. What is the process performance index? In the X-bar chart, LCL = UCL - 6 / = 3.5 (6)(.515) / = 17.1 Then LCL+UCL)/ = 0.3, which is closer to USL than to LSL, so Cpk = ( ) / (3 *.515) = (c) Suppose the process mean shifts upwards by one standard deviation. What is the probability the mean shift will not be detected in the next three lots? Assume the X-bar chart is used to do the mean shift detection. Now k = 3, = 1. For one lot, the probability the OOC is not detected is Prob = k*n 0.5 k*n *5 0.5 ) 3 1*5 0.5 ) ) 5.36) For no detection in the next three lots, = (d) Assuming the mean shift in part (c) goes undetected, what is the expected fraction of production exceeding the upper spec limit? Z USL Z = ( )/.515 = 1.1 Therefore, Expected fraction scrapped = Probability of scrap = 1 (1.1) = = Control charts are in use to track the critical dimensions after etching. Five sample measurements are made from one wafer per lot. The average of the measurements and the range of the measurements are computed and are tracked in standard 3-sigma control charts. The X-bar chart is observed to display upper spec limit = 105.0, upper control limit = 95.4, lower control limit = 79.0, and lower spec limit = (Any dice above the upper specification limit or below the lower specification limit are defective and will be scrapped.) (a) What is the process capability index, and what is the process performance index? UCL - LCL = 6 / n = 6 / = 6.11 Cp = (USL - LSL) / 6* = ( ) / 6*6.11 =

4 = ( ) / = 87. which is closer to USL than to LSL So Cpk = ( ) / 3*6.11 = 0.97 (b) What are the upper and lower control limits of the range chart? n=5 d3 = 0, d4 =.11, d =.36 Then R = d* = (.36)(6.11) = 14.1 and so LCL = 0, UCL = d4* R = (.11)(14.1) = 9.98 (c) Suppose the mean of the critical dimension shifts to 9.0. What is the probability that the X-bar chart will make a Type error in each of the next five lots? (A Type error means the process is out of control but the control chart does not detect it.) Suppose 9 = = * Prob of Type error = Prob { LCL X UCL E X = * } = Prob { (-3)/(n 0.5 ) X - (3)/(n 0.5 ) E X = * } = Prob { (-3*)/(n 0.5 ) * X * (3)/(n 0.5 ) * E X = * } = Prob { *(5 0.5 ) { X * } / [ /(5 0.5 )] *(5 0.5 ) E X = * } ( *(5 0.5 ) ) - ( *(5 0.5 ) ) (1.43) - (-4.757) ~ (1.43) = The probability the shift is not detected in the first 5 lots is (0.893) 5 = (d) During the time that the mean shift is not detected, what fraction of die output will be defective because the etch dimension is out-of-spec? The probability of falling below LCL after the mean shifts upward to 9.0 is negligible. Hence the Fraction scrapped = Prob of scrap = Prob { X > 105 X ~ N( 9, 6.11 ) } 4

5 = Prob { Z > (105-9) / 6.11 } = Prob { Z >.18 } = We expect 1.65% of the die output will be defective because the etch dimension is out-ofspec. 4. The upper specification limit for a critical process parameter is At present, the scrap rate due to exceeding the USL is 1. percent. There is no lower specification limit. Assume the process parameter has a normal distribution. (a) What is the value of the process performance index? The value of Cpk is determined as follows: Scrap rate = 1.% Prob { Z (USL ) / } = Z =.6 from the table at back of notes. Hence (USL ) / =.6. Now Cpk = (USL ) / 3* =.6 / 3 = (b) In an X-bar chart for this parameter with sample size of four, the upper control limit is What are the mean and standard deviation of the process parameter? UCL = + 3* / n or 40.0 = + 3* /. Using the value of USL given in part (a), we have = +.6*. Solving the two equations in two unknowns, we find = 8.1 and = The upper specification limit for a critical process parameter is 5.0, and the lower specification limit is At present, the scrap rate due to exceeding the USL is 1.5% and the scrap rate due to falling below the LSL is 0.5%. Assume the process parameter has a normal distribution. (a) What is the process capability index? Using the table in the back of the notes, a right tail of 1.5% corresponds to Z =.17, and a left tail of 0.5% corresponds to Z = Hence +.17* = 5.57* = 170 Solving for, we get 4.74* = 55, implying = 11.6 and =

6 So Cp = (USL LSL) / 6* = (5 170) / (6*11.6) = (b) What is the process performance index? Cpk = (USL ) / 3* = ( ) / (3*11.6) = (c) For a sample size of 5, what is the upper control limit in the range chart for this parameter, and what is the upper control limit in the X-bar chart for this parameter? For the R-chart, R = *d = 11.6*.36 = 7.0, LCL = R *d3 = 0, and UCL = R *d4 = 6.98*.11 = For the X-bar chart, UCL = + 3* / (5 0.5 ) = The number of particles deposited on wafers at a particular process step is subject to statistical process control. The upper control limit is 70 particles. The upper specification limit is 60 particles, i.e., wafers with 60 or more particles deposited on them are scrapped. (a) What kind of control chart should be used to track this parameter? Assume in the following questions that this kind of chart is in use. Use a c-chart. (b) What is the process performance index for this step? (Hint: apply the quadratic formula to find the mean number of particles deposited on a wafer.) We are given UCL = 70, USL = 60. Cpk = (USL )/3*, so we need to find and. Now = c, = c 0.5, so we need to find c. UCL = c + 3*[c 0.5 ]. UCL *UCL*c + c = 9*c UCL (*UCL + 9)*c + c = 0 Apply the quadratic formula to solve for c: UCL 9 c 4UCL 36UCL 81 4UCL UCL 9 36UCL 81 UCL 9 3 4UCL (17) 70 4(70)

7 Hence Cpk = (60 49) / 3(7) = (c) What is the yield of this process step? Prob { Z > (60 49) / 7 } = Prob { Z > 1.57 } = Hence the yield is = (d) To raise the yield of this step to 98%, what value for the process performance index must be achieved? We want Prob { Z > 3 Cpk } = = 0.0 From Table A-4, we find 3 Cpk =.05 or Cpk = FPD Inc. manufactures flat panel displays used in laptops. The manufacturing process for the panels is similar to that of the wafer fabrication process, i.e., it includes steps for photolithography, etching and deposition performed on a microscopic scale for which quality is not easily observed. Each flat panel display is comprised of a large number of pixels. Each pixel can fail, thereby affecting the quality of the display. If the number of pixels that do not function is large, then the display becomes dim and undesirable. The specification limit for the maximum number of non-functional pixels on a panel at FPD has been set to be 5,000. If the number is greater than 5,000, then the panel is rejected. A control chart is to be set up to monitor the number of pixels that do not function on completed panels so as to decide whether the process is in statistical control or not. (a) What kind of control chart should be set up? Use a c-chart. (b) Suppose this kind of control chart has been set up, and the process performance index is.48. Determine the mean number of non-functional pixels. (Hint: Apply the quadratic formula to find the mean number of non-functional pixels per panel.) Cpk = (USL ) / 3* = (USL ) / (3* 0.5 ).48 = (5000 ) / (3* 0.5 ) 3(.48) 0.5 =

8 x10 6 1x = 5x , , (10,055.35) , , , (c) Determine the control limit for this chart (assuming the usual 3-sigma control rule). UCL = + 3* 0.5 = * = 470.1, i.e.,

IEOR 130 Review. Methods for Manufacturing Improvement. Prof. Robert C. Leachman University of California at Berkeley.

IEOR 130 Review. Methods for Manufacturing Improvement. Prof. Robert C. Leachman University of California at Berkeley. IEOR 130 Review Methods for Manufacturing Improvement Prof. Robert C. Leachman University of California at Berkeley November, 2017 IEOR 130 Purpose of course: instill cross-disciplinary, industrial engineering