CDAUI-8 Chip-to-Module (C2M) System Analysis. Stephane Dallaire and Ben Smith, August 24 th 2015

Transcription

1 CDAUI-8 Chip-to-Module (C2M) System Analysis Stephane Dallaire and Ben Smith, August 24 th 2015

2 Introduction We investigate the merits of various reference receiver architectures for GBaud PAM4 C2M Relative merits are evaluated on the basis of Channel Operating Margin (COM) of the full C2M link (rather than TP1a, which doesn t account for RX package reflections) We investigate the benefits of a 2-tap TXFIR To avoid auto-negotiation or other TXFIR optimization schemes, we show that a coarse 2-tap TXFIR (10%, 5%, or 0% pre) provides most of the benefit of pre-equalization Similar to Hedge et al. (who focused on C2C channels): A low-frequency equalizer (LFEQ) is shown to be beneficial Reducing the target PAM4 symbol error rate is beneficial, and well-motivated due to non-bursty nature of error events We discuss the choice of the target PAM4 symbol error rate for a CTLE-based RX We shouldn t be too pessimistic! 2

3 System Model TX and RX package models (.s4p file) each add ~1dB of GHz Die Termination with 120fF parasitic capacitance Module RX model: (1z,1 p) low-frequency equalizer (zero & pole ~1GHz) (1z, 2p) reference CTLE (from OIF-VSR-56G PAM-4 and CAUI-4 C2M): 3

4 System Model Host TX model: 750 mv differential peak-to-peak SNDR = 29 db (peak-to-rms) RLM = 0.9 RJ = 0.01 UIrms DJ = 0.05 UI peak-to-peak 2-tap TXFIR (i.e., pre+cursor) 4

5 Channel Models CHANNEL FEXT NEXT From IEEE 802.3bs shanbhag_3bs_14_0623: (1) Nelco SI Host PCB + next gen 28Gb/s high density SMT IO (2) EM-888 Host PCB + next gen 28Gb/s press-fit stacked IO From IEEE 802.3bs shanbhag_3bs_01_1014: (3) 4in Megtron6 Host PCB + next gen 28Gb/s high density SMT IO (4) 10in Megtron6 Host PCB + next gen 28Gb/s high density SMT IO (5) 4in Megtron6 Host PCB + next gen 28Gb/s press-fit stacked IO (6) 10in Megtron6 Host PCB + next gen 28Gb/s press-fit stacked IO Cisco Channels: GHz (db) ILD (dbrms) (7) Cisco 2in Stacked (8) Cisco 5in Stacked

6 Link Margin Calculation The COM definition of margin is a quantification of the Vertical Eye Opening (VEO) COM VEO 20 log 10 min Avupp Avupp vupp, Av mid Av mid v mid, Eye contours are measured for a target symbol error rate DER 0 Av low Av low v low 6

7 Baseline Results Reference CTLE Receiver No TXFIR, No LFEQ, DER 0 =1E-6 Channel COM (db) Only the ~4dB channels have positive margin 7

8 Improvements (1) Reference CTLE + TXFIR COM program optimizes TXFIR: C , C 1 + C 0 = 1 No LFEQ, DER 0 =1E-6 Channel CTLE CTLE + TXFIR A 2-tap TXFIR brings significant improvement on higher loss channels Residual ISI cancellation is critical to PAM4 8

9 Improvements (2) Reference CTLE + TXFIR + LFEQ COM program optimizes TXFIR and LFEQ : 0.5 GHz z 2.5 GHz, 0.5 GHz p 2.5 GHz DER 0 =1E-6 Channel CTLE CTLE + TXFIR CTLE + TXFIR + LFEQ LFEQ approximately 0.5 db to 1 db of margin improvement in most cases LFEQ is useful to minimize residual ISI in the neighborhood of postcursors approximately 2 to 5 bauds the cursor 9

10 Improvements (3) Reference CTLE + TXFIR + LFEQ + (DER 0 = 1E-5) DER 0 =1E-6 is unnecessarily stringent Errors for proposed receiver are approximately independent identically distributed (or, at least, significantly less bursty than DFE-based RX). From anslow_3bs_03_0515 (slide 17), for electrical sub-links with random errors, bit-error-rate ~= 8.2E-4 per link, for a 0.1dB penalty in the optical link DER 0 = 1E-5 corresponds to BER=5E-6, so still a conservative target Channel CTLE CTLE + TXFIR CTLE + TXFIR + LFEQ (1E-6) CTLE + TXFIR + LFEQ (1E-5)

11 Practical Considerations CTLE+TXFIR+LFEQ This implies a (potentially) complex optimization But most of the gain be obtained with fixed settings: High Loss: TXFIR = [-0.1,0.9]; LFEQ: (z = 1 GHz, p = 1.2 GHz) Medium Loss: TXFIR = [-0.05,0.95]; LFEQ: (z = 1 GHz, p = 1.2 GHz) Channel CTLE CTLE + TXFIR CTLE + TXFIR + LFEQ (1E-6) CTLE + TXFIR + LFEQ (1E-5) CTLE + TXFIR[-0.1,0.9] + LFEQ(1G,1.2G) + (1E-5) CTLE + TXFIR[-0.05,0.95] + LFEQ(1G,1.2G) + (1E-5)

12 Conclusions A 2-tap TXFIR can be set coarsely, as a function of channel loss, with little loss in performance High Loss (~10dB): [-0.1, 0.9] Medium Loss (~5dB): [-0.05, 0.95] Low Loss: [0,1] A reference receiver with an LFEQ provides additional ISI cancellation The target PAM4 symbol error strongly influences the system margin Relative to a DFE-based system (e.g., C2C), the target should be decreased, due to absence of long bursts For channels with similar GHz, margin is influenced by ILD Cisco channels have ILD (dbrms) approximately twice as large as the worst of the other six channels 12

13 Backup Slides

14 Improvements (4) Increasing the reference receiver bandwidth provides only a minor improvement in link margin, in a few cases Reference CTLE poles and zero scaled by 10% Scaled Reference CTLE + TXFIR + LFEQ, DER 0 =1E-5 Channel CTLE CTLE + TXFIR CTLE + TXFIR + LFEQ (1E-6) CTLE + TXFIR + LFEQ (1E-5) Scaled CTLE + TXFIR + LFEQ (1E-5)

15 Comments on EV6 and EH6 In 802.3bj, a COM margin of 3 db was considered sufficient for channel compliance In current OIF draft, EH6 is set to 50mV This is quite stringent for high loss channels, corresponding to a COM larger than 3dB Example 1: TX Output: 750mV peak-to-peak; PAM levels: (+/-125 mv,+/-375 mv) Equalization of 10dB channel loss (plus TX package losses) scales TX levels by factor of ~2.5 Received levels (with perfect TX linearity): (+/ , +/- 125) A 50 mv eye opening corresponds to a COM of 20 log = 8 db Example 2 (Same Channel & EQ as Example 1): TX Output: 1V peak-to-peak, R LM =0.9; PAM levels: (+/-200 mv,+/-500 mv) Received levels (with perfect TX linearity): (+/- 80, +/- 200) A 50 mv eye opening corresponds to a COM of 20 log = 4.7 db 15