Utilizing current test strategies to drive diagnostics development, deployment and support through software tools
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1 Utilizing current test strategies to drive diagnostics development, deployment and support through software tools
2 So Why Is it So Hard To Understand or Do we Just Make It Hard? Answer on a student s Geometry test
3 Using The Learning Organization Process to Improve External/Internal Disturbances Behavior Results Act Object of Interest Measure Understanding Decide Physics Data Predict Theory Analyze Experiment Knowledge Learn
4 So Why Do We Test. Risk - To Measure the Health of the Process - To Reduce Risk of Variability - To Identify Problems Meet Spec Verify Design Ship Product that Works Warranty Cost Design Validation Manufacturing Support
5 The Problem
6 How Much is Really at Risk? Yield at Test Stage 90% 85% 80% 75% 1.0% 0.0% 2.0% 4.0% 6.0% 8.0% 10.0% 12.0% 14.0% Shipped Defect Rate Exposure 50% Coverage 60% Coverage 70% Coverage 80% Coverage 90% coverage
7 Typical Test Strategy SMT Test Sub Assy Test Top Level Assy Test Ship Repair Repair Repair Effectiveness Effectiveness Effectiveness Fault Spectrum Fault Spectrum Fault Spectrum Characteristics: Broad coverage at each test High level of redundant test Leakage of early defects caught later by test Fault coverage is unpredictable Fault Spectrum Effectiveness
8 Process Test Coverage Redundancy Solder X- Ray Insufficient Excess Cold Solder Marginal Joints Voids Shorts Open Missing Gross Shorts Lifted Leads Excess Bent Leads Bridging Tombstone Misalignment Polarity, Extra Part, Non-Elec. parts Bypass Caps, L s Lifted Power/Gnd AOI CT I Dead Part Wrong Part Bad Part Short/Open on PCB Functionally Bad Inverted Polarity Correctness Electrical Functional
9 Example Design Coverage ICT AXI AOI Functional Solder ~10% NOT COVERED X- Ray 66.6% Unique Coverage 33.5% (FA) 5.0% Unique Coverage 2.8% (FA) AOI CT I 12.2% Unique Coverage 51.1% (FA) Correctness 5.5% Unique Coverage 3.9% (FA) Electrical Functional
10 Example of Coverage Functional AXI AOI ICT Solder X- 44.0% Ray Unique Coverage 3.2% Unique Coverage 41.2% Unique Coverage Functional CT I 0.9% Unique Coverage 2.9% (FA) ~10% NOT COVERED AOI Correctness Electrical
11 What is Needed
12 Coverage Mapping and What We Know Pass Input A IC1 T1 IC2 Output X +/- % Fail B Y +/- % Pass C HY1 IC3 C1 Z +/- % Process Test Coverage (Static) - Functional Coverage (Dynamic) -
13 Coverage Mapping and What We May Know???? Pass Input A IC1 T1 IC2 Output X +/- % Fail B Y +/- % Pass C HY1 IC3 C1 Z +/- %?? Process Test Coverage (Static) - Functional Coverage (Dynamic) -??
14 Coverage Mapping and What We Want to Know 80% Possible NTF Pass Input A IC1 T1 IC2 Output X +/- % Fail B Y +/- % Pass C HY1 IC3 C1 Z +/- % 20% Process Test Coverage (Static) - Functional Coverage (Dynamic) -
15 The Answer
16 Desired Production Test Process SMT Test Sub Assy Test Top Level Assy Test Ship Repair Repair Repair Fault Spectrum Effectiveness Fault Spectrum Effectiveness Fault Spectrum Effectiveness Characteristics: Test in right place Minimize redundant test Effectively catch defects at origin Fault coverage is predictable Fault Spectrum Effectiveness
17 What is Needed For Effective Test Strategies A common Framework for describing Test Strategies. Standardized documentation for test. Metrics to make test tradeoffs between test strategies (AXI, AOI, ICT, Functional, etc) for gaps and overlaps. Ability to simulate a Test Strategy as the product is being developed to feedback DFX input. A consistent, repeatable process throughout the product life cycle. What is not needed is. An automated way to develop test plans A tool to eliminate the need for test developers
18 4 Analog LIB 90% 90% 90% 90% 90% 4 Other LIB 28 Other LIB 81% 81% 6 Other LIB 88% 91% 88% 88% 88% 5 Analog LIB 24 Other LIB 6 Mixed LIB 6 Digital LIB 4 Other LIB 28 Other LIB 4 Other LIB 6 Mixed LIB 76% 38% 80 Other LIB 76% NO 0% 6 Digital LIB 76% NO 0% 6 Digital LIB 76% NO 0% 6 Digital LIB 8 Digital LIB 24 Other LIB 86% 86% 86% 48 Digital LIB 6 Other LIB 28 Mixed LIB 79% NO 0% 1 Single Pin 76% NO 0% 5 Other LIB 76% NO 0% 2 Connector 10 Other LIB 93% 93% 93% 93% 93% 6 Analog LIB 5 Analog LIB 2 Resistor 2 Resistor 94% 79% NO 0% 2 Resistor 94% 79% NO 0% 2 Resistor 2 Resistor 94% 94% 79% NO 0% 2 Resistor Grade Score Grade Score Grade Score Grade Score Grade Score Pins Type FT+AXI+AOI+ICT Current Access FT+AXI+AOI+ICT Full Access FT + AXI + AOI FT + AXI Functional Coverage Component Sample of Product Coverage Mapping
19 Test Optimization Software: Knowledge Transfer
20 Elements for a true Product Life Cycle Test Strategy Multiple design teams, multiple locations, using common design rules, common design tools for uniform test strategies. Transfer product designs, processes, test and repair knowledge in a predictable, repeatable manner to anyone anywhere. Model, simulate and predict test performance, quality, and cost drivers. Deliver manufacturing specifications without flying engineers everywhere. Have a common language for communicating product/process functionality. Consistent repair and diagnostic process with no variability, any time, any where and by anybody.
21 Example of Change
22 Using The Learning Organization Process to Improve External/Internal Disturbances Pass Fail Pass?????? Object of Interest?? Behavior Fail Pass Pass 80% Results 20% Effectiveness Act Fault Spectrum Decide Understanding ICT X-Ray Func AOI Predict Measure 76% 76% 90% 76% 76% 90% Knowledge Fault Spectrum Effectiveness Learn Analyze
23 Original Manufacturing Flow Complexity and Variability at Every Step Pristine Yield= 0% Pristine Yield= 43% Yield= 0% Yield= 67% Yield= 78% Yield= 86% Yield= 96% SMT I Thru- Hole I MDA SRU Assembly Cells SRU Cell Test LRU Assembly Cell LRU Cell Test ESS LRU Cell Test Final System Assembly and Configuration Final Assembly System Test Ship Repair Repair Repair Diagnostics Repair Diagnostics Repair Diagnostics Repair Diagnostics Repair Diagnostics DT RE-TEST 30 Mins REPAIR RE-TEST 1 Day REPAIR RE-TEST 2 Days REPAIR RE-TEST 4 Days REPAIR RE-TEST 6 Days REPAIR DIAGNOSE DIAGNOSE DIAGNOSE DIAGNOSE DIAGNOSE Distribution of Defects by Symptom Other Placement Wrong/Bad Parts Solder/Workmanship LRU SRU DT 0% 20% 40% 60% 80%
24 Redesigned Manufacturing Flow Pristine Yield= 72% Yield= 80% Yield= Yield= Yield= Yield= SMT Thru- Hole XRAY MDA SRU Assembly Cells SRU Cell Test LRU Assembly Cell ESS LRU Cell Test Final System Assembly and Configuration Final Assembly System Test Ship Repair Repair Diagnostics Repair Diagnostics Repair Diagnostics DT RE-TEST 15 Mins REPAIR RE-TEST 30 Mins REPAIR RE-TEST 60 Mins REPAIR RE-TEST 60 Mins REPAIR DIAGNOSE DIAGNOSE DIAGNOSE DIAGNOSE
25 Financial Impact of Redesign Flow What is the impact of Efficient Test and Effective Diagnostics? Increase in quality and reduction in diagnostic and repair of products $.67 Million Increase productivity of production lines due to increased test capacity (20% * 200 units/yr * $20K/unit) Savings in elimination of new tests and testers at SRU (at $500K) and LRU (at $1,000K) test cells* (($500K * 4 + $1,000 * 4) * 25%) Reduction in total cycle time due to increased quality and re-alignment of processes ( 5days * $240day * 960 units/year ) $.8 Million $1.50 Million $1.15 Million $2.62 Million First Year 5 year ROI $16.3 Million
26 Conclusion
27 Leverage Points in the Product Life Cycle Concept Investigation Definition Development HW Qualification SW Qualification First Production Shipment Support Life STRT STRT DEF DEF DEV DEV QUAL QUAL SHP SHP SUP SUP CLO CLO 80-90% of manufacturing cost determined before QUAL 90% of achievable first pass yield determined by QUAL 80% of potential profitability fixed at DEV 80% of MTBR determined before DEV Current tools will allow you to leverage these advantages by: Eliminating Complexity and Variability Ensuring Efficient and Effective Test Strategies before release Developing Automated Diagnostics with little additional resources during development Using Test and Diagnostics as part of a learning organization throughout the total product life cycle to leverage Results!!
28 Questions???
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