ELE 665 (ESS), R SYSTEM DESIG COSIDERTIOS MSC TMU Recever Desg System Specs Stadards T p l g e s Trasmtter ~ ~ Trascever Buldg Blcks Duplexer lter L DC Up Cverters Hw d yu assg specfcats t each buldg blck?
Each blck shares part f the ttal specfcat f the system ad f ts ttal budget. Ma specs vlve se, pwer ga, mmum sgal pwer (sestvty) ad learty (dstrt). Let us dscuss these parameters (specs) e by e ad detfy ther trade-ffs. se Perfrmace V s R Output se Where ut s the utput se desty, s the se frm the put surce resstace, s the vltage ga, ad s the crcut geerated se desty.
Observe that the put-referred se desty s p, ref ut p, ref fr Sgal t se Rat (S/) s a key parameter the system ad crcut desg. fgure f mert t evaluate S/ s the s called se factr (). measures the amut f se prduced by a R devce relatve t the ambet thermal se at ts put, ad s defed as the rat ttal utput se pwer utput se duetthe put surce ut
4 te that ca be als expressed as a fuct f p,ref as p,ref ut The se fgure () s fte defed as the se factr uts f db. 0 lg s fte used t characterze the S/ at the utput ad put prt. Thus e ca rewrte as () ut ut ut ut SR SR S S S S S S Where S ad S are the put ad utput sgal pwer, respectvely.
5 OISE IGURE O CSCDE SYSTEMS,,, ut,,.. ut are the se at the put, utput blck, ad the utput blck, respectvely. te that. ut L L L L
6 Thus, the put referred se due t,,.. becmes ut p,ref L Observe that we have assumed that the put se f the th stage cmes frm the put resstace f th stage ad ths quatty s fr all stages, thus p,ref ca be expressed as: p,ref ttal p,ref ; urthermre tce that ad L L
The ( ) 0 Smlarly fr,.., the the se factr ca be expressed as: ttal te that EXMPLE L ca be related t pwer gas, G, fr a certa resstace.e., R s 50Ω. L Mxer lter DC If the ad ga f the blcks are: L: 0dB ga, db (, ) Mxer: 0dB ga, 0 db (, ) VG lter: 80dB ga, 0 db (, ) 7
ttal ttal. 9956 9 00 99 00. 0. 846 ttal. 9 db tce that the addtal blcks have deterrated the L by abut 0.4 db. Exercse. Repeat the ttal calculat wth a ew L wth f.55 db ad a ga f db. Hw s the ttal cmpared wth prevus case? 8
Iput se Pwer Desty ( ) V s R s sy V s * 0 R s seless RR s seless kt (.8 0 J K )( 90K ) 400. 0 J 0.4dBW / Hz s watts per hertz, ad ca be expressed dbm fr rm temperature (90 K), ad a BW f Hz as ( ) dbm 74 dbm Thus, the mmum pwer sgal that ca be detected prperly by a recever s ( ) dbm ; wth a sgal havg the same pwer as the put se. The avalable se pwer s defed as P r kt P Δ f Δ f Δ f 9
SESITIVITY Ths parameter s specfed fr each cmmucat stadard. Sestvty (S m ) s the mmum sgal pwer appled t the recever put termals that yelds the requred utput sgal-t-se rat. ( Sm ) ( ) ( ) db ( 0 lg BW ) ( Predct S/) db dbm dbm db s the put se pwer desty ( ) prduced the surce resstr feedg the recever. Ths mght cme frm the put resstr f a put sgal geeratr used fr lab testg r frm the equvalet resstace frm the atea. kt watts Hz ( ) 74dBm dbm 0
se gure () db ( ) ( S ) - ( S ) db db put db utput ( ) s the verall se fgure f the recever. db Badwdth BW The maxmum attaable sestvty depeds the badwdth f the mdulated sgal, sce a arrwer recever badwdth wll dstrt the demdulated sgal, causg tersymbl terferece ad creasg the bt errr rate (BER) dgtal cmmucats ad degradg fdelty ad tellgblty f aalg sgals. The BW s maly determed by I flter ad the cmmercal SW resatrs.
Predetect Sgal-t-se Rat Ths term s the SR eeded fr a specfed BER. r M aalg detect, the requred (sgal se dstrt)/(se dstrt) db s fte specfed as the perfrmace crter. EXMPLE: Csder the fllwg recever archtecture wth the dvdual specs shw fr each flck. G s represet the pwer gas. L BP BP I lter BP Detectr G 5dB G db. 5dB G 8dB 0dB G 4 6dB GW 00KHz 5 0dB S 8. 5dB Data
ELE 665 (ESS), TMU The se factr fr the frst 5 buldg blcks ca be expressed as: ttal G G G 4 G G G 5 G G G G 4 Substtutg the parameters (t dbs)* the abve express yelds: ttal. 4 ad. 8 db I the sestvty (TOTL) express, the BW term yelds: ( 0 5 ) 54. db Hz 0lg 8 ( Sm ) 74. 8 54. 8 8. 5 06. 9 dbm db m * /0 0 ; G 0 G ( B) 0
Refereces [] W.. Ega, Practcal R System Desg, Jh Wley & Ss 00 [] W. She,. Emra, ad E. Sáchez-Sec, CMOS R Recever System Desg: Systematc pprach IEEE Trasact Crcuts ad Systems I: Regular Papers: Vlume: 5, Issue 5, pp. 0-04, May 006. []. Emra,. Valdes-Garca, Xa B,.. Mheld,.Y. Valer-Lpez, S.T. M, C. X, ad E. Sáchez-Sec, Chamele: Dual Mde 80.b/Bluetth Recever System Desg IEEE Trasact Crcuts ad Systems I: Regular Papers: Vlume: 5, Issue 5, pp. 99-00, May 006. [4] M. El-zah, K.Etesar, E. Sáchez-Sec, " Systematc System-Level Desg Methdlgy fr Dual-Bad CMOS R Recevers", 50th IEEE Mdwest Sympsum Crcuts ad Systems, pp. 04-07, ug. 007 4